Microchip Technology Switchtec™ PFX Gen 5 Fanout PCIe® Switches
Microchip Technology Switchtec™ PFX Gen 5 Fanout PCIe® Switches support up to 100 lanes, 52 ports, 26 virtual switch partitions, and 48 Non-Transparent Bridges (NTBs). These switches provide hot- and surprise-plug controllers for each port, advanced error containment, comprehensive diagnostics and debug capabilities, and a wide breadth of I/O interfaces. Typical applications include data center equipment, defense and industrial servers, workstations, test equipment, video production and broadcasting equipment, cellular infrastructure, access networks, and metro networks.
Features
- High-performance non-blocking Gen 5 switches:
- 100-lane, 84-lane, 68-lane, 52-lane, 36-lane and 28-lane variants
- Up to 48 NTBs assignable to any port
- Logical Non-Transparent (NT) interconnect allows for larger topologies
- Supports 1+1 and N+1 failover mechanisms
- NT address translation using direct windows and multiple sub-windows per BAR
- DMA controller:
- High-performance and ultra-low latency cut-through DMA engine
- Up to 64 DMA channels
- Error containment:
- Advanced Error Reporting (AER) on all ports
- Downstream Port Containment (DPC) on all downstream ports
- Completion Timeout Synthesis (CTS) to prevent an error state in an upstream host due to incomplete non-posted transactions
- Hot- and surprise-plug controllers per port
- GPIOs configurable for different cable/connector standards
- PCIe interfaces:
- Passive, managed, and optical cables
- SFF-8644, SFF-8643, SFF-8639, OCuLink and other connectors
- SHPC-enabled slot and edge connectors
- Diagnostics and debug:
- Real-time eye capture
- External loopback capability
- Errors, statistics, performance, and TLP latency counters
- Peripheral I/O interfaces:
- Two-Wire Interfaces (TWIs) with SMBus support
- SFF-8485-compliant SGPIO ports
- Parallel GPIO pins
- UARTs
- 100/GE MAC ports (RMll/GMll)
- JTAG and EJTAG interface
- High-speed I/O:
- PCIe Gen 5 32GT/s
- Supports PCIe-compliant link training and manual PHY configuration
- Power management:
- Active State Power Management (ASPM)
- Software-controlled power management
- ChipLink diagnostic tools:
- Extensive debug, diagnostics, configuration, and analysis tools with an intuitive GUI
- Access to configuration data, management capabilities, and signal integrity analysis tools (such as real-time eye capture)
- Connects to the device over in-band PCIe or sideband signals (UART, TWI, and EJTAG)
- Low-power Serializer/Deserializer (SerDes)
- Secure system solution with boot image authentication
Applications
- Data center equipment
- Defense and industrial servers
- Workstations
- Test equipment
- Video production and broadcasting equipment
- Cellular infrastructure
- Access networks
- Metro networks
- Core networking
Example Application
Related Products
Microchip Technology Switchtec™ PFX Gen 4 Fanout PCIe® Switches
Supports up to 100 lanes, 52 ports, 26 virtual switch partitions, and 48 non-transparent bridges.
Microsemi / Microchip Switchtec PFX PCIe Gen3 Fanout Switches
Compliant with PCIe Base Specification 3.1, supports up to 96 lanes & 24 virtual switch partitions.