STMicroelectronics STGAP2SICSN Single Gate Drivers

The STM STGAP2SICSN 4A Single Gate Driver is available in two different configurations. The first configuration offers separated output pins that allow independent turn-on and turn-off optimization using dedicated gate resistors. The second configuration features a single output pin and Miller CLAMP function that prevents gate spikes during fast commutations in half-bridge topologies. Both formats provide high flexibility and bill of material reduction for external components.

Protection functions are integrated on the STGAP2SICSN, including UVLO with optimized value for SiC MOSFETs and thermal shutdown are included to design high-reliability systems efficiently. Dual input pins allow choosing the control signal polarity and implementing HW interlocking protection to avoid cross-conduction in case of a controller malfunction. The input-to-output propagation delay results are contained within 75ns, providing high PWM control accuracy. A standby mode is available to reduce idle power consumption.