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Texas Instruments LMK00725 LVPECL Clock Fanout Buffer

Texas Instruments LMK00725 is a low skew, high-performance clock fanout buffer which can distribute up to five 3.3V LVPECL outputs from one of two inputs, which can accept differential or single-ended inputs. The clock enable input is synchronized internally to eliminate runt or glitch pulses on the outputs when the clock enable pin is asserted or de-asserted. The low additive jitter and phase noise floor and ensured output and part-to-part skew characteristics make the LMK00725 ideal for applications demanding high performance and repeatability.

Features

  • Five 3.3V Differential LVPECL Outputs
    • Additive Jitter: 43fs RMS (typ) @ 312.5MHz
    • Noise Floor (≥1 MHz offset):
    • -158dBc/Hz (typ) @ 312.5MHz
    • Output Frequency: 650MHz (max)
    • Output Skew: 35ps (max)
    • Part-to-Part Skew: 100ps (max)
    • Propagation Delay: 0.37ns (max)
  • Two Differential Input Pairs (pin-selectable)
    • CLKx, nCLK Input Pairs can accept LVPECL,
    • LVDS, HCSL, SSTL, LVHSTL, or Single-Ended Signals
  • Synchronous Clock Enable
  • Power Supply: 3.3V ±5%
  • Package: 20-Lead TSSOP
  • Industrial Temperature Range: -40°C to +85°C

Applications

  • Wireless and wired infrastructure
  • Networking and data communications
  • Servers and computing
  • Medical imaging
  • Portable test and measurement
  • High end A/V

Block Diagram

Block Diagram - Texas Instruments LMK00725 LVPECL Clock Fanout Buffer
Publicado: 2014-01-08 | Actualizado: 2022-03-11