STMicroelectronics SPC574S64E3 32-Bit Power Architecture MCU

STMicroelectronics SPC574S64E3 32-Bit Power Architecture Microcontroller (MCU) is ideal for automotive chassis and safety applications. STMicroelectronics SPC574S64E3 MCU belongs to the automotive-focused products family that addresses chassis and safety electronics applications. The host processor core is advanced, cost-efficient, and complies with the Power Architecture embedded category. The device implements the VLE (variable-length encoding) APU, improving code density. The SPC574S64E3 operates at speeds of up to 140MHz and offers high-performance processing optimized for low power consumption.

Features

AEC-Q100 qualified
High-performance e200z4d dual core
- 32-bit power architecture technology CPU
- Core frequency as high as 140MHz
- Dual issue 5-stage pipeline in-order execution core
- VLE
- Core MPU
- Floating Point, End-to-End Error Correction
- 8KB instruction cache with error detection code
- 32KB local data RAM and 4KB data cache along with 8KB instruction cache
1600KB (1.5MB code + 64KB data) on-chip flash memory: supports read during program and erase operations, and multiple blocks allowing EEPROM emulation
128KB on-chip RAM (96KB on-chip RAM + 32KB local data RAM)
Multi-channel direct memory access controller (eDMA) with 32 channels
Comprehensive latest generation ASILD safety concept
- ASILD SEooC approach (Safety Element out of Context)
- FCCU for collection and reaction to failure notifications
- Memory Error Management Unit (MEMU) for collection and reporting of error events in memories
- End-to-end Error Correction Code (e2eECC) logic
- Cyclic redundancy check (CRC) unit
Eight enhanced 12-bit SAR analog converters
- Two sets of three ADCs and one supervisor ADC
- 1.5μs conversion time at 12MHz
- Up to 32 physical channels
- Dual Programmable CTU
Four general-purpose eTimer units (six channels each)

Four FlexPWM units
- Two (four channels each) used for motor control with hardware synchronization between the control systems
- Two (two channels each) used for SWG emulation
Communication interfaces
- Four LINFlexD modules
- Four deserial serial peripheral interface (DSPI) modules
- Three MCAN interfaces with advanced shared memory scheme (808 x 32-bit words for MCAN0/2 and 520 x 32 bit words for MCAN1) and CAN-FD support
- One FlexRay module with two channels, 128 message buffers
- Two SENT interfaces (three channels each)
Dual phase-locked loops with stable clock domain for peripherals and FM modulation domain for computational shell
Nexus Class 3 debug and trace interface
On-chip CAN/UART Bootstrap loader with BAF. Physical Interface (PHY) can be UART
Advanced and flexible supply scheme
- On-chip voltage regulator for 1.2V core logic supply. Bypass mode supported for external 1.2V core logic supply
- 3.3V or 5V IO and ADC supply (2 independent power domains available)
-40°C to +150°C junction temperature range